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Inventi Impact - VLSI

Articles

  • Inventi:evs/106/14
    REVERSIBLE LOGIC: A NEW AREA AND POWER OPTIMIZATION TECHNIQUE TO DESIGN LOGIC BLOCK FOR FPGA
    Arnov Mukherjee, Jenil Jain

    In the past few years reversible logic is very promising research area and has applications in several technologies like nano-electronics, low power CMOS design, optical computing, bioinformatics, quantum computing. Nowadays reversible logic gates are emerging to be compatible with future generation technology which has significant reduction in overall heat dissipation. FPGAs are more demanding in recent years due to its features of changing design up to last minute and it provide s ability for designers to avoid pitfall of nano-electronic design. But the area and power consumption is major drawback of FPGAs over application specific ICs (ASICs). In this manuscript our approach is towards design and implementation of logic block of Plessey FPGAs with reduced number reversible gates, quantum cost and garbage output. Our proposed design is based on most cost effective reversible circuit including 3*3 MUX gate (MG) in comparison with existing reversible circuit in literature.

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