To minimize energy consumption of a digital circuit, logic can be operated at\nsub- or near-threshold voltage. Operation at this region is challenging due to device and\nenvironment variations, and resulting performance may not be adequate to all applications.\nThis article presents two variants of a 32-bit RISC CPU targeted for near-threshold voltage.\nBoth CPUs are placed on the same die and manufactured in 28 nm CMOS process. They\nemploy timing-error prevention with clock stretching to enable operation with minimal\nsafety margins while maximizing performance and energy efficiency at a given operating\npoint. Measurements show minimum energy of 3.15 pJ/cyc at 400 mV, which corresponds\nto 39% energy saving compared to operation based on static signoff timing.
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