Offshore fabrication, assembling and packaging challenge chip security, as original chip designs may be tampered by malicious\ninsertions, known as hardware Trojans (HTs).HTdetection is imperative to guarantee the chip performance and safety. ExistingHT\ndetection methods have limited capability to detect small-scale HTs and are further challenged by the increased process variation.\nTo increase HT detection sensitivity and reduce chip authorization time, we propose to exploit the inherent feature of differential\ncascade voltage switch logic (DCVSL) to detect HTs at runtime. In normal operation, a system implemented with DCVSL always\nproduces complementary logic values in internal nets and final outputs. Noncomplementary values on inputs and internal nets in\nDCVSL systems potentially result in abnormal power behavior and even system failures. By examining special power characteristics\nof DCVSL systems upon HT insertion, we can detect HTs, even if the HT size is small. Simulation results show that the proposed\nmethod achieves up to 100% HT detection rate. The evaluation on ISCAS benchmark circuits shows that the proposed method\nobtains a HT detection rate in the range of 66% to 98%.
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