The canonical signed digit (CSD) representation of constant coefficients is a unique signed data representation containing the\r\nfewest number of nonzero bits. Consequently, for constant multipliers, the number of additions and subtractions is minimized\r\nby CSD representation of constant coefficients. This technique is mainly used for finite impulse response (FIR) filter by reducing\r\nthe number of partial products. In this paper, we use CSD with a novel common subexpression elimination (CSE) scheme on\r\nthe optimal Loeffler algorithm for the computation of discrete cosine transform (DCT). To meet the challenges of low-power and\r\nhigh-speed processing, we present an optimized image compression scheme based on two-dimensional DCT. Finally, a novel and\r\na simple reconfigurable quantization method combined with DCT computation is presented to effectively save the computational\r\ncomplexity. We present here a new DCT architecture based on the proposed technique. From the experimental results obtained\r\nfrom the FPGA prototype we find that the proposed design has several advantages in terms of power reduction, speed performance,\r\nand saving of silicon area along with PSNR improvement over the existing designs as well as the Xilinx core.
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