Over the past decade, wireless sensor network research primarily relied on\r\nhighly-integrated commercial off-the-shelf radio chips. The rigid silicon implementation\r\nof the radio stack restricted access to the lower layers; thus, research focused mainly\r\non the medium access control (MAC) layer and above. SRAM field-programmable\r\ngate array (FPGA)-based software-defined radios (SDR), on the other hand, provide a\r\nflexible architecture to experiment with any and all layers of the radio stack, but usually\r\nrequire desktop computers and draw high currents that prohibit mobile or longer-term\r\noutdoor deployments. To address these issues, we have developed a modular flash\r\nFPGA-based wireless research platform, called Marmote SDR, that has computational\r\nresources comparable to those of SRAM FPGA-based radio platforms, but at a reduced\r\npower consumption, with duty cycling support. We discuss the design decisions underlying\r\nMarmote SDR and evaluate its power consumption. Furthermore, we present and evaluate\r\nan asynchronous and multiple access communication protocol specifically designed for\r\ndata-gathering wireless sensor networks.
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