This paper describes a fourth-order cascade-of-integrators with feedforward (CIFF)\nsingle-bit discrete-time (DT) switched-capacitor (SC) delta-sigma modulator (DSM) for high-resolution\napplications. This DSM is suitable for high-resolution applications at low frequency using a high-order\nmodulator structure. The proposed operational transconductance amplifier (OTA), used a feedforward\namplifier scheme that provided a high-power efficiency, a wider bandwidth, and a higher DC gain\ncompared to recent designs. A chopper-stabilization technique was applied to the first integrator to\nremove the 1/f noise from the transistor, which is inversely proportional to the frequency. The designed\nDSM was implemented using 0.35 micromcomplementary metal oxide semiconductor (CMOS) technology.\nThe oversampling ratio (OSR) was 128, and the sampling frequency was 128 kHz. At a 500 Hz\nbandwidth, the signal-to-noise ratio (SNR) was 100.3 dB, the signal-to-noise distortion ratio (SNDR)\nwas 98.5 dB, and the dynamic range (DR) was 103 dB. The measured total power dissipation was\n99 microW from a 3.3 V supply voltage.
Loading....