This paper presents a word length selection method for the implementation of digital controllers in both fixed-point and floatingpoint\r\nhardware on FPGAs. This method uses the new types defined in the VHDL-2008 fixed-point and floating-point packages.\r\nThese packages allow customizing the word length of fixed and floating point representations and shorten the design cycle\r\nsimplifying the design of arithmetic operations. The method performs bit-true simulations in order to determine the word\r\nlength to represent the constant coefficients and the internal signals of the digital controller while maintaining the control system\r\nspecifications. A mixed-signal simulation tool is used to simulate the closed loop system as a whole in order to analyze the impact\r\nof the quantization effects and loop delays on the control system performance. The method is applied to implement a digital\r\ncontroller for a switching power converter. The digital circuit is implemented on an FPGA, and the simulations are experimentally\r\nverified.
Loading....