This paper presents a methodology to integrate a fuzzy coprocessor described in VHDL (VHSIC Hardware Description Language)\r\nto a soft processor embedded into an FPGA, which increases the throughput of the whole system, since the controller uses\r\nparallelism at the circuitry level for high-speed-demanding applications, the rest of the application can be written in C/C++.\r\nWe used the ARM 32-bit soft processor, which allows sequential and parallel programming. The FLC coprocessor incorporates a\r\ntuning method that allows to manipulate the system response. We show experimental results using a fuzzy PD+I controller as the\r\nembedded coprocessor.
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