Embedded video applications are now involved in sophisticated transportation systems like autonomous vehicles and driver\nassistance systems. As silicon capacity increases, the design productivity gap grows up for the current available design tools.\nHence, high-level synthesis (HLS) tools emerged in order to reduce that gap by shifting the design efforts to higher abstraction\nlevels. In this paper, we present ViPar as a tool for exploring different video processing architectures at higher design level. First,\nwe proposed a parametrizable parallel architectural model dedicated for video applications. Second, targeting this architectural\nmodel, we developed ViPar tool with two main features: (1) An empirical model was introduced to estimate the power consumption\nbased on hardware utilization and operating frequency. In addition to that, we derived the equations for estimating the\nhardware utilization and execution time for each design point during the space exploration process. (2) By defining the main\ncharacteristics of the parallel video architecture like parallelism level, the number of input/output ports, the pixel distribution\npattern, and so on, ViPar tool can automatically generate the dedicated architecture for hardware implementation. In the\nexperimental validation, we used ViPar tool to generate automatically an efficient hardware implementation for a Multiwindow\nSum of Absolute Difference stereo matching algorithm on Xilinx Zynq ZC706 board. We succeeded to increase the design\nproductivity by converging rapidly to the appropriate designs that fit with our system constraints in terms of power consumption,\nhardware utilization, and frame execution time.
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