Current Issue : October - December Volume : 2014 Issue Number : 4 Articles : 6 Articles
A multicurved sheet metal surface for a skin structure has usually been manufactured using a conventional die forming process\ninvolving the use of both a die and a press machine in accordance with the product shape.However, such processes are economically\ninefficient because additional production costs are incurred for the development and management of forming tools. To overcome\nthis drawback, many alternative processes have been developed; however, these still suffer from problems due to defects such as\ndimples and wrinkles occurring in the sheet. In this study, a new sheet metal forming process called the flexibly reconfigurable roll\nforming (FRRF) process is proposed as an alternative to existing processes. Unlike existing processes, FRRF can reduce additional\nproduction costs resulting from material loss and significantly reduce forming errors. Furthermore, it involves the use of a smaller\napparatus. The methodology and applicable procedure of the FRRF process are described. Numerical forming simulations of\nrepresentative multicurved sheet surfaces are conducted using FEM. In addition, a simple apparatus is developed for verifying\nthe feasibility of this process, and a doubly curved metal is formed to verify the applicability of the reconfigurable roller, a critical\ncomponent in this forming process....
The very nature of universities makes them unique environments for research and teaching. Although both activities constantly\nborrow from each other, a deeper level of interaction is not always achieved for several reasons. This paper presents a successful\nexperience on conducting an undergraduate course on embedded systems, based on strong interaction with related research\nactivities previously conducted by the authors. Known for being everywhere, embedded systems are constantly expanding in both\ncomplexity and volume production. In addition, heterogeneous systems are becoming prevalent in modern applications, standing\nas an additional difficulty to students in this area. In this context, this paper presents experiences in teaching embedded systems\nusing a project-based learning pedagogical approach, with strong emphasis on mobile robotic applications previously developed\nby MSc and PhD students. As a result, it has been observed that undergraduate students have the opportunity to build a strong\nbackground and feel better prepared to face the challenges to be found in their future professional activities....
In this work, we provide the implementation and analysis of a cognitive transceiver for opportunistic networks. We\nfocus on a previously introduced dynamic spectrum access (DSA) - cognitive radio (CR) solution for primary-secondary\ncoexistence in opportunistic orthogonal frequency division multiplexing (OFDM) networks, called cognitive\ninterference alignment (CIA). The implementation is based on software-defined radio (SDR) and uses GNU Radio and\nthe universal software radio peripheral (USRP) as the implementation toolkit. The proposed flexible transceiver\narchitecture allows efficient on-the-fly reconfigurations of the physical layer into OFDM, CIA or a combination of both.\nRemarkably, its responsiveness is such that the uplink and downlink channel reciprocity from the medium\nperspective, inherent to time division duplex (TDD) communications, can be effectively verified and exploited. We\nshow that CIA provides approximately 10 dB of interference isolation towards the OFDM receiver with respect to a\nfully random precoder. This result is obtained under suboptimal conditions, which indicates that further gains are\npossible with a better optimization of the system. Our findings point towards the usefulness of a practical CIA\nimplementation, as it yields a non-negligible performance for the secondary system, while providing interference\nshielding to the primary receiver....
Reconfigurable ring filter based on single-side-access ring topology is presented. Using capacitive tuning elements, the electrical\nlength of the ring can be manipulated to shift the nominal center frequency to a desired position. A synthesis is developed to\ndetermine the values of the capacitive elements. To show the advantage of the synthesis, it is applied to the reconfigurable filter\ndesign using RF lumped capacitors. The concept is further explored by introducing varactor-diodes to continuously tune the\ncenter frequency of the ring filter. For demonstration, two prototypes of reconfigurable ring filters are realized using microstrip\ntechnology, simulated, andmeasured to validate the proposed concept.Thereconfigured filter using lumped elements is successfully\nreconfigured from 2GHz to 984.4MHz and miniaturized by 71% compared to the filter directly designed at the same reconfigured\nfrequency, while, for the filter using varactor-diodes, the frequency is chosen from 1.10GHz to 1.38GHz spreading over 280MHz\nfrequency range. Both designs are found to be compact with acceptable insertion loss and high selectivity....
COordinate Rotation DIgital Computer (CORDIC) is an effective method that is used in digital signal processing applications for\ncomputing various trigonometric, hyperbolic, linear, and transcendental functions. This paper presents the theoretical basis and\npractical implementation of circular (sine-cosine) CORDIC-based generator. Synthesis results of this generator based on Altera\nStratix III FPGA (EP3SL340F1517C2) using Quartus II version 9.0 show that the proposed hybrid FPGA architecture significantly\nreduces latency (42% reduction) with a small area overhead, compared to the conventional version. The proposed algorithm has\nbeen simulated for sine and cosine function evaluation, and it has been verified that the accuracy is comparable with conventional\nalgorithm....
As today�s hardware architecture becomes more and more complicated, it is getting harder to modify or improve the\nmicroarchitecture of a design in register transfer level (RTL). Consequently, traditional methods we have used to develop a design\nare not capable of coping with complex designs. In this paper, we suggest a way of designing complex digital logic circuits with a\nsoft and advanced type of SystemVerilog at an electronic system level.We apply the concept of design-and-reuse with a high level of\nabstraction to implement elliptic curve crypto-processor server farms.With the concept of the superior level of abstraction to the\nRTL used with the traditional HDL design, we successfully achieved the soft implementation of the crypto-processor server farms\nas well as robust test bench code with trivial effort in the same simulation environment. Otherwise, it could have required errorprone\nVerilog simulations for the hardware IPs and other time-consuming jobs such as C/SystemC verification for the software,\nsacrificing more time and effort. In the design of the elliptic curve cryptography processor engine, we propose a 3X faster GF(2m)\nserial multiplication architecture....
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