Current Issue : April - June Volume : 2015 Issue Number : 2 Articles : 6 Articles
This paper presents a novel CMOS low-power voltage limiter/regulator circuit with hysteresis for inductive power transfer in\nan implanted telemetry application. The circuit controls its rail voltage to the maximum value of 3V DC employing 100mV of\ncomparator hysteresis. It occupies a silicon area of only 127 ????m Ã?â?? 125 ????m using the 130 nm IBM CMOS process. In addition, the\ncircuit dissipated less than 1mW and was designed using thick-oxide 3.6V NMOS and PMOS devices available in the process\nlibrary....
When designing an analog front-end for neural interfacing, it is hard to evaluate\nthe interplay of priority features that one must upkeep. Given the competing nature of\ndesign requirements for such systems a good understanding of these trade-offs is necessary.\nLow power, chip size, noise control, gain, temporal resolution and safety are the salient ones.\nThere is a need to expose theses critical features for high performance neural amplifiers\nas the density and performance needs of these systems increases. This review revisits the\nbasic science behind the engineering problem of extracting neural signal from living tissue.\nA summary of architectures and topologies is then presented and illustrated through\na rich set of examples based on the literature. A survey of existing systems is presented for\ncomparison based on prevailing performance metrics....
The proportional-integral-derivative (PID) is still the most common controller and stabilizer used in industry due to its simplicity\nand ease of implementation. In most of the real applications, the controlled system has parameters which slowly vary or are\nuncertain.Thus, PID gains must be adapted to cope with such changes. In this paper, adaptive PID (APID) controller is proposed\nusing the recursive least square (RLS) algorithm. RLS algorithm is used to update the PID gains in real time (as system operates) to\nforce the actual system to behave like a desired reference model. Computer simulations are given to demonstrate the effectiveness of\nthe proposed APID controller on SISO stable and unstable systems considering the presence of changes in the systems parameters....
Fluctuating photovoltaic (PV) output power reduces the reliability in power system when there is a massive penetration of PV\ngenerators. Energy storage systems that are connected to the PV generators using bidirectional isolated dc-dc converter can be\nutilized for compensating the fluctuating PV power.This paper presents a grid connected energy storage system based on a 2 kW\nfull-bridge bidirectional isolated dc-dc converter and a PWM converter for PV output power leveling. This paper proposes two\ncontrollers: a current controller using the d-q synchronous reference and a phase-shift controller.Themain function of the current\ncontroller is to regulate the voltage at the high-side dc, so that the voltage ratio of the high-voltage side (HVS) with low-voltage\nside (LVS) is equal to the transformer turns ratio.The phase-shift controller is employed to manage the charging and discharging\nmodes of the battery based on PV output power and battery voltage. With the proposed system, unity power factor and efficient\nactive power injection are achieved. The feasibility of the proposed control system is investigated using PSCAD simulation....
This paper proposes a simple, accurate, and easy to model approach for the simulation of photovoltaic (PV) array and also provides\na comparative analysis of the same with two other widely usedmodels. It is highly imperative that the maximum power point (MPP)\nis achieved effectively and thus a simple and robustmathematicalmodel is necessary that poses less mathematical complexity aswell\nas lowdata storage requirement, inwhich the maximum power point tracking (MPPT) algorithm can be realized in an effective way.\nFurther, the resemblance of the P-V and I-V curves as obtained on the basis of experimental data should also be taken into account\nfor theoretical validation. In addition, the study incorporates the root mean square deviation (RMSD) from the experimental data,\nthe fill factor (FF), the efficiency of the model, and the time required for simulation. Two models have been used to investigate the\nI-V and P-V characteristics. Perturb and Observe method has been adopted for MPPT. The MPP tracking is realized using field\nprogrammable gate array (FPGA) to prove the effectiveness of the proposed approach. All the systems are modeled and simulated\nin MATLAB/Simulink environment....
An ultra-low voltage sixth-order low pass filter topology, suitable for sensing\nthe T-wave signal in an electrocardiogram (ECG), is presented in this paper. This is\nrealized using a cascade connection of second-order building blocks constructed from a\nsinh-domain two-integrator loop. The performance of the filter has been evaluated using the\nCadence Analog Design Environment and the design kit provided by the Austria Mikro\nSysteme (AMS) 0.35-?m CMOS process. The power consumption of filters was 7.21 nW,\nwhile a total harmonic distortion (THD) level of 4% was observed for an input signal of\n220 pA. The RMS value of the input referred noise was 0.43 pA, and the simulated value\nof the dynamic range (DR) was 51.1 dB. A comparison with already published\ncounterparts shows that the proposed topology offers the benefits of 0.5-V supply voltage\noperation and significantly improved power efficiency....
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