Current Issue : April - June Volume : 2015 Issue Number : 2 Articles : 5 Articles
Multiplication is a common operation in many applications and there exist various types of multiplication operations. Current\nhigh level synthesis (HLS) flows generally treat all multiplication operations equally and indistinguishable from each other\nleading to inefficient mapping to resources. This paper proposes algorithms for automatically identifying the different types of\nmultiplication operations and investigates the ensemble of these different types of multiplication operations. This distinguishes it\nfrom previous works where mapping strategies for an individual type of multiplication operation have been investigated and the\ntype of multiplication operation is assumed to be known a priori. A new cost model, independent of device and synthesis tools, for\nestablishing priority among different types of multiplication operations for mapping to on-chip DSP blocks is also proposed.This\ncost model is used by a proposed analysis and priority ordering based mapping strategy targeted at making efficient use of hard\nDSP blocks on FPGAs while maximizing the operating frequency of designs. Results show that the proposed methodology could\nresult in designs which were at least 2Ã?â?? faster in performance than those generated by commercial HLS tool: Vivado-HLS....
The development of self-adaptive real-time embedded (RTE) systems is an increasingly hard task due to the growing complexity of\nboth hardware and software and the high variability of the execution environment. Different approaches, platforms, and middleware\nhave been proposed in the field, from low to high abstraction level. However, there is still a lack of generic and reusable designs\nfor self-adaptive RTE systems that fit different system domains, lighten designers� task, and decrease development cost. In this\npaper, we propose five design patterns for self-adaptive RTE systems modeling resulting from the generalization of relevant existing\nadaptation-related works. Combined together, the patterns form the design of an adaptation loop composed of five adaptation\nmodules. The proposed solution offers a modular, reusable, and flexible specification of these modules and enables the separation\nof concerns. It also permits dealing with concurrency, real-time features, and adaptation cost relative to the adaptation activities.\nTo validate our solution, we applied it to a complex case study, a cross-layer self-adaptive object tracking system, to show patterns\nutilization and prove the solution benefits...
This paper presents a novel feature descriptor called TreeBASIS that provides improvements in descriptor size, computation time,\nmatching speed, and accuracy. This new descriptor uses a binary vocabulary tree that is computed using basis dictionary images\nand a test set of feature region images. To facilitate real-time implementation, a feature region image is binary quantized and the\nresulting quantized vector is passed into the BASIS vocabulary tree. A Hamming distance is then computed between the feature\nregion image and the effectively descriptive basis dictionary image at a node to determine the branch taken and the path the feature\nregion image takes is saved as a descriptor. The TreeBASIS feature descriptor is an excellent candidate for hardware implementation\nbecause of its reduced descriptor size and the fact that descriptors can be created and features matched without the use of floating\npoint operations. The TreeBASIS descriptor is more computationally and space efficient than other descriptors such as BASIS,\nSIFT, and SURF. Moreover, it can be computed entirely in hardware without the support of a CPU for additional software-based\ncomputations. Experimental results and a hardware implementation show that the TreeBASIS descriptor compares well with other\ndescriptors for frame-to-frame homography computation while requiring fewer hardware resources....
Mapping of cores has been an important activity in NoC-based system design aimed to find the best topological location onto the\nNoC, such that the metrics of interest can be greatly optimized. In the last years, partial reconfigurable systems (PRSs) have included\nNetworks-on-Chips (NoCs) as their communication structure, adding complexity to the problem of mapping. Several works have\nproposed specific and robust NoC architectures for PRSs, forming indirect and irregular networks, in which cases the mapping\nand placement problems must be treated altogether. The placement deals with the physical positioning of those cores inside the\nreconfigurable device. Up to now, to the best of our knowledge, the mapping-placement problem for those kinds of architectures\nhas not been addressed yet. In this work, the problem formalization for the design-time hardware core placement and mapping\nin PRS-NoCs is proposed and methodologies for solving it with genetic algorithms (GAs) are presented. Several GA crossovers\nand methodologies are compared for obtaining the best solution. Results have shown that best GA solution obtained, in average,\ncommunication costs with 4% of penalty when compared with global minimum cost, obtained in a semi exhaustive approach. In\naddition, the algorithm presents low execution times....
This paper presents a comparison of on-body performances between omnidirectional (loop antenna) and reconfigurable beam steering\nantennas. Both omnidirectional and reconfigurable antennas were manufactured on the same fabric substrate and operated\nat the frequency band of the WLAN 802.11a (5.725ââ?¬â??5.85GHz). The reconfigurable antenna was designed to steer the beam\ndirections. In order to implement the beam-steering capability, the antenna used two PIN diodes. The maximum beam directions\nof three states (states 0, 1, and 2) were steerable in the YZ-plane (? = 2?, 28?, and 326?, resp.). The measured peak gains were 5.9ââ?¬â??\n6.6 dBi and the overall half power beam width (HPBW) was 102?. The measured results of total radiated power (TRP) and total\nisotropic sensitivity (TIS) indicated that the communication efficiency of the reconfigurable beam steering antenna was better than\nthat of the loop antenna. When the input power was 0.04W (16 dBm), the simulated specific absorption rate (SAR) values of the\nreconfigurable beam steering antenna on the body were less than 0.979 W/kg (1 g tissue) in all states, satisfying the SAR criteria of\nthe US....
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