Current Issue : October - December Volume : 2017 Issue Number : 4 Articles : 5 Articles
The paper proposes an information technology framework for the development of an\nembedded remote system for non-destructive observation and study of sensitive archaeological sites.\nThe overall concept and motivation are described. The general hardware layout and software\nconfiguration are presented. The paper concentrates on the implementation of the following\ninformational technology components: (a) a geographically unique identification scheme supporting\na global key space for a key-value store; (b) a common method for octree modeling for spatial\ngeometrical models of the archaeological artifacts, and abstract object representation in the global key\nspace; (c) a broadcast of the archaeological information as an Extensible Markup Language (XML)\nstream over the Web for worldwide availability; and (d) a set of testing methods increasing the fault\ntolerance of the system. This framework can serve as a foundation for the development of a complete\nsystem for remote archaeological exploration of enclosed archaeological sites like buried churches,\ntombs, and caves. An archaeological site is opened once upon discovery, the embedded computer\nsystem is installed inside upon a robotic platform, equipped with sensors, cameras, and actuators,\nand the intact site is sealed again. Archaeological research is conducted on a multimedia data stream\nwhich is sent remotely from the system and conforms to necessary standards for digital archaeology....
Recently, with the development of embedded system hardware technology, there is a\nneed to support various kinds of operating system (OS) operation in embedded systems. In mobile\nprocessors, ARM started to provide the virtualization extension support technology which was\nintended for processors in PC processors. Virtualization technology has the advantage of using\nhardware resources effectively. If the real-time operating system (RTOS) is operated on a hypervisor,\nthere is a problem that RTOS performance is degraded due to overhead. Thus, we need to compare\nthe performance between a single execution of the RTOS and simultaneous execution of multiple\nOS (RTOS + Linux). Therefore, in this paper, we measure the performance when the RTOS operates\nindependently on the NVidia Jetson TK-1 embedded board supporting virtualization technology.\nThen, we measure the performance when the RTOS and Linux are operating simultaneously on top\nof a hypervisor. For this purpose, we implemented and ported such a RTOS, especially FreeRTOS\nand uC/OS, onto two embedded boards, such as the Arndale board (SAMSUNG, Seoul, South Korea)\nand the NVidia TK1 board (NVIDIA, Santa Clara, CA, USA)....
Real-time electromagnetic transient simulators are important tools in the design stage of new control and protection systems for\npower systems. Real-time simulators are used to test and stress new devices under similar conditions that the device will deal with\nin a real network with the purpose of finding errors and bugs in the design. The computation of an electromagnetic transient is\ncomplex and computationally demanding, due to features such as the speed of the phenomenon, the size of the network, and the\npresence of time variant and nonlinear elements in the network. In this work, the development of a SoC based real-time and also\noffline electromagnetic transient simulator is presented. In the design, the required performance is met from two sides, (a) using a\ntechnique to split the power system into smaller subsystems, which allows parallelizing the algorithm, and (b) with specialized and\nparallel hardware designed to boost the solution flow.The results of this work have shown that for the proposed case studies, based\non a balanced distribution of the node of subsystems, the proposed approach has decreased the total simulation time by up to 99\ntimes compared with the classical approach running on a single high performance 32-bit embedded processor ARM-Cortex A9....
Measurement-Based Probabilistic Timing Analysis (MBPTA) has been shown to be an industrially viable method to\nestimate the Worst-Case Execution Time (WCET) of real-time programs running on processors including several\nhigh-performance features. MBPTA requires hardware/software support so that program�s execution time, and so its\nWCET, has a probabilistic behaviour and can be modelled with probabilistic and statistic methods. MBPTA also\nrequires that those events with high impact on execution time are properly captured in the (R) runs made at analysis\ntime. Thus, a representativeness argument is needed to provide evidence that those events have been captured.\nThis paper addresses the MBPTA representativeness problems caused by set-associative caches and presents a novel\nrepresentativeness validation method (ReVS) for cache placement. Building on cache simulation, ReVS explores the\nprobability and impact (miss count) of those cache placements that can occur during operation. ReVS determines the\nnumber of runs R, which can be higher than R, such that those cache placements with the highest impact are\neffectively observed in the analysis runs, and hence, MBPTA can be reliably applied to estimate the WCET....
The article provides a detailed description of the series of special radiation-hardened\nmicroprocessor developed by SRISA for use in space technology. The microprocessors have\n32-bit and 64-bit KOMDIV architecture with embedded SpaceWire, RapidIO, Ethernet and\nMIL-STD-1553B interfaces. These devices are used in space telescope GAMMA-400 data\nacquisition system, and may also be applied to other experiments in space (such as observatory\n\"Millimetron\" etc.)....
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